UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 22219

8.1i ISE - Project Navigator ABEL language flow issues

Description

Keywords: ABL, support, create, schematic, symbol, convert, simulation, check syntax, fit

ABEL HDL language is supported in Project Navigator for CPLD devices. However, in the ISE 8.1i Early Access and the initial 8.1i release, the ABEL language flow is not fully integrated.

This Answer Record describes features of the ABEL flow that are not currently available, but will be included in the general ISE 8.1i or in the first Service Pack for ISE 8.1i.

Solution

ABEL Flow issues fixed in ISE 8.1i
- The Create Schematic Symbol process is not available for ABEL project source files.
- Post-Fit simulation is not available for ABEL project source files.
- The Check Syntax does not work for ABEL project source files.
- Process status markers are not shown for implementation processes.

The latest 8.1i Service Pack is available at:
http://www.xilinx.com/xlnx/xil_sw_updates_home.jsp

ABEL Flow issues Fixed in 8.1.01i
- The TDO-to-ABEL/HDL converter process is not available.
- ABEL Simulation processes lose status when focus is switched to another window and then back.
- Assign Package Pin Process for ABEL flow does not invoke PACE.
- The ABEL flow cannot handle the module name longer than 8 characters.
- View Generated HDL Testbench process in ABEL flow does not work when ModelSim is selected as the simulator.
AR# 22219
Date Created 09/04/2007
Last Updated 03/04/2008
Status Archive
Type General Article