This Answer Record contains the Release Notes for the LogiCORE Fibre Channel v2.1 Core that was released in the 8.1i IP Update #1 and includes the following:
- New Features in v2.1
- Bug Fixes in v2.1
- Known Issues in v2.1
For installation instructions and design tools requirements, see (Xilinx Answer 22155).
New Features in v2.1
- Support added for ISE 8.1i
- Support added for Cadence IUS (NC-Sim and associated compiler)
- Example Design includes Calibration Block v1.2.1 for the Virtex-4 FX RocketIO (tested in hardware)
Bug Fixes in v2.1
Known Issues in v2.1
1. Setup and hold errors in DCM_STANDBY macro are occasionally reported in timing simulation. For more information on these timing violations, see (Xilinx Answer 22667).
2. The example design currently uses the Virtex-4 v1.2.1 calibration block for CES2/3. For the latest calibration block v1.2.2 for CES2/3, see (Xilinx Answer 22477). To migrate to the v1.4.1 calibration block (CES4 requirement), install the patch below.
3. Virtex-4 GT11 attributes are targeted for CES2/3. To update attributes for CES4, install the patch below.
4. New clocking scheme for CES4 does not require DCM to generate TXUSRCLK for multi-speed cores. To use, install the patch below. For more information, see (Xilinx Answer 23679).
5. Core not adhering to OL1 timeout under Loss of Signal. This is fixed in the patch below.
6. Core ignores some errors in ordered sets. This is fixed in the patch below.
7. RxParity does not work correctly. This is fixed in the patch below.
To update to Virtex-4 CES4 and resolve issues 2, 3, 4, 5, 6 and 7 from the list of issues above, apply the following patch to the Xilinx ISE installation with the 8.1i Service Pack 3 and IP Update #1 or 8.2i Service Pack 2 IP Update #1:
1. Install the patch by extracting the contents of the ".zip" or "tar.gz" archive to the root directory of the Xilinx installation. Select the option that allows the extractor to overwrite all of the existing files and maintain the directory structure predefined in the archive.
Determine the Xilinx installation directory by entering the following at the command prompt:
UNIX or Linux
Determine the Xilinx installation directory by entering the following:
NOTE: You may be required to have system administrator privileges to install the patch.
2. After installing the patch, regenerate the Fibre Channel v2.1 Core from CORE Generator. The core and supporting files generated contain the updates listed above.