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AR# 22338

Are all of the VCCINT, VCCAUX, VCCAUX_IO, VCCO, or GND pins in the FPGA connected internally?


Are all of the VCCINT, VCCAUX, VCCAUX_IO, VCCO, or GND pins in the FPGA connected internally?

My PCB board contains unsoldered or unconnected VCCINT and VCCAUX pins. Will the device work properly?



VCCINT inputs feed a common metalization inside the chip, so they are connected internally. However, all VCCINT balls should be soldered to ensure good decoupling capacitors and to minimize IR drop and noise on the power rails.  

The distribution of VCCINT (or ICCINT) is not perfect with incomplete connections. Although your design might work, it is exposed to uncontrolled internal VCC drop and VCC noise. Xilinx does not recommend this approach.


All VCCAUX bumps on the die go to a common metal interconnect and to a common connection on the laminate package.

As with VCCINT, DO NOT leave any VCCAUX pins unconnected, because it increases the inductance to the bypass caps and slightly increases noise and jitter. VCCAUX pins must be well bypassed.

For more information on VCCAUX, see (Xilinx Answer 11182).


VCCAUX_IO are found in 7 Series High Performance (HP) I/O banks. The VCCAUX_IO pins are localized to each I/O bank, and are separate from the global VCCAUX pins/interconnect.


Most VCCO pins are only tied together for pins in the same bank. However, some of the smaller Spartan-II packages (VQ100, TQ144, CS144 and PQ208) share a common VCCO power rail between different banks.


On the die, all ground inputs (relative to VCCAUX, VCCOs , VCCINT) feed a common metalization.

AR# 22338
Date 10/21/2013
Status Active
Type General Article
  • SoC
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