In simulation, the Block Memory Generator models do not flag collision for asymmetric read-write ports.
This issue occurs when the core is configured such that:
- Virtex-4 true dual-port memory is used
- the read data width is much larger than write data width on both ports, and
- the operating mode of port A or B is "NO_CHANGE" or "WRITE_FIRST"
When both Port A and B write to different subwords of a larger word that is read out on the output port, the simulation models will not flag the read-write collisions. This occurs in both behavioral and structural simulations.
This issue is addressed in Block Memory Generator v2.2.