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AR# 22703

LogiCORE SPI-4.2 (POS-PHY L4) v7.4 - Migrating from v6.2 to v7.4 (Migration Guide)

Description

This Answer Record shows how to migrate the SPI-4.2 Core from v6.2 to v7.4, and describes the signal changes made to the core. Every attempt was made to keep constraints, input, and output signals consistent between versions. This Answer Record covers those modifications required to upgrade from v6.2 to v7.4. 

 

The following sections are included in this Answer Record: 

 

- Core Signal Changes 

- Wrapper File Changes 

- NCF File Changes 

- UCF File Changes 

- Dynamic Alignment Implementation Considerations

Solution

Core Signal Changes 

 

The following signals were removed from the v7.4 Sink Core: 

- SnkDPAMode(Output): Removed in v7.4, not used in the new dynamic alignment configuration. 

- SnkDPAModeSel(Input): Removed in v7.4, not used in the new dynamic alignment configuration. 

- RDClk180_GP(Output): Removed in v7.4, not used by the core. 

 

The following signals were removed from the v7.4 Source Core: 

- SysClk180_GP(Output): Removed in v7.4, not used by the core. 

- SysClk180_GBSLV(Input): Removed in v7.4, not used by the Source Core in slave clocking mode. 

 

The following signals were added to the v7.4 Sink Core: 

- SnkIdelayRefClk(Input): A 200 MHz reference clock required by the ISERDES. This input signal must be connected to internal or external clock of 200 MHz for both static and dynamic alignment solutions. 

- SnkClksRdy(Output): This signal indicates all Sink Core clocks are ready for use. If not needed, it can be left 

unconnected. 

- SnkDPAFailed(Output): This signal indicates phase alignment has failed at the end of the alignment sequence. 

 

The following signal was added to the v7.4 Source Core: 

- SrcClksRdy(Output): This signal indicates all Source Core clocks are ready for use. If not needed, it can be left unconnected. 

- DcmLost_TDClk(Output): This signal indicates whether the SysClk_P(N) input is lost. Only available when global clock distribution is used. If not needed, it can be left unconnected. 

- DcmLost_TSClk(Output): This signal indicates whether the TSClk input is lost. Only available when global clock distribution is used. If not needed, it can be left unconnected. 

- SrcOofOverride(Input): When this signal is asserted, the Source core behave as if in-frame, and sends data on TDat regardless of the status received on TStat. This signal is used for system testing and debugging. 

 

For more information, see the User Guide.

 

Wrapper File Changes 

The v7.4 wrapper file replaces the v6.2 wrapper file.

 

NCF File Changes 

The v7.4 Core does NOT require NCF files. The v6.2 NCF files must be removed.

 

UCF File Changes 

The UCF file must be updated by replacing all SPI-4.2 constraints in the UCF file with SPI-4.2 constraints provided in the v7.4 release (use the v7.4 UCF files instead of the v6.2 UCF files).

 

Dynamic Alignment Implementation Considerations 

The v7.4 Core has a different dynamic alignment algorithm. Please see the User Guide for more information on dynamic alignment implementation considerations.

AR# 22703
Date Created 09/04/2007
Last Updated 05/19/2014
Status Archive
Type General Article