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AR# 22970

8.1 AccelDSP Synthesis Tool - I cannot achieve a throughput of "1" on my design. Do you have any suggestions?

Description

I cannot achieve a throughput of "1" on my design. Do you have any suggestions?

Solution

To reduce the number of clock cycles needed, perform the following steps: 

 

1. Use the "Unroll" directive to fully unroll all loops in the design. 

2. Check the MATLAB source for writes to variables before reads from the same variables. These might not be scheduled in one clock cycle while a read before write can be scheduled in one clock cycle. Move MATLAB variable assignments after all uses of that variable. 

3. If you receive an I-QOR-0201 message, follow the link for suggestions. 

4. Try to unmap the memory if area requirements can still be met. Memmaps can affect throughput because you cannot do more than read and write one bit per cycle per memory. 

5. Some non-memmapped arrays can affect throughput depending on how they are used/addressed. 

 

NOTE: Some designs cannot be scheduled to achieve a throughput of "1".

AR# 22970
Date Created 09/04/2007
Last Updated 05/20/2014
Status Archive
Type General Article