AR# 2301: M1.3 MAP: ERROR:x4kma:312 - Unable to obey design constraints which require the combination...
AR# 2301
M1.3 MAP: ERROR:x4kma:312 - Unable to obey design constraints which require the combination...
Description
Keywords: Map, x4kma, 312, CLB, constraints
Urgency: Hot
Reference #: 11202, 11585
When user has UCF location constraints file to pack unrelated H, F & G, FFS into one CLB. Map gives following error: <OUTPUT> ERROR:x4kma:312 - Unable to obey design constraints which require the combination of the following symbols into a single CLB: DFF symbol `DMOD_4_INSTANCE/SU_DDS/ACCLSB_REG<10>/$1I13' (output signal=DMOD_4_INSTANCE/SU_DDS/ACCLSB<10>) FMAP symbol `DMOD_4_INSTANCE/SU_DDS/DMOD_4_INSTANCE/SU_DDS/U886_MAP' (output signal=DMOD_4_INSTANCE/SU_DDS/N1825) DFF symbol `DMOD_4_INSTANCE/SU_DDS/ACCLSB_REG<11>/$1I13' (output signal=DMOD_4_INSTANCE/SU_DDS/ACCLSB<11>) FMAP symbol `DMOD_4_INSTANCE/SU_DDS/DMOD_4_INSTANCE/SU_DDS/U890_MAP' (output signal=DMOD_4_INSTANCE/SU_DDS/N1824) HMAP symbol `DMOD_4_INSTANCE/SU_DDS/URXSIN/DMOD_4_INSTANCE/SU_DDS/URXSIN/U262_MAP' (output signal=DMOD_4_INSTANCE/SU_DDS/URXSIN/N1001) There are more than two (2) four-input function generators. These symbols share the same LOC attribute, and thus must be placed in the same CLB. </OUTPUT>
Solution
Current M1.3 MAP does not support BEL(Basic Element)-based constraints such as: <INPUT> #PLACE INSTANCE DMOD_4_INSTANCE/SU_DDS/ACCLSB_REG<11>/$1I13: CLB_R8C19.FFY; INST "DMOD_4_INSTANCE/SU_DDS/ACCLSB_REG<11>/$1I13" LOC = "CLB_R8C19.FFY" ;
#PLACE INSTANCE DMOD_4_INSTANCE/SU_DDS/ACCLSB_REG<10>/$1I13: CLB_R8C19.FFX; INST "DMOD_4_INSTANCE/SU_DDS/ACCLSB_REG<10>/$1I13" LOC = "CLB_R8C19.FFX" ; .. .. </INPUT> note the .FFX and .FFY are BEL-based constraints.
Work around: User can create physical macro in EPIC to pack logics into one CLB. Create a symbol for it, then instantiate it from the design. Please refer to on-line documentation for instruction on creating physical macros.