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AR# 23209

8.2i XST - Known Issues

Description

This Answer Record contains Known Issues for XST 8.2i.

Solution

Q1. Can XST pass generics and define in the command line?

A1. This feature is not currently supported. Support for this feature is planned for ISE 9.1i.

Q2. Backward Register Balancing has no effect on carry chains.

A2. See (Xilinx Answer 21766).

Q3. Using disable constructs in "for loops" does not work.

A3. This is a known limitation in XST. Support for this is planned for ISE 9.1i.

Q4. The stop condition != is not supported in "for loops."

A4. See (Xilinx Answer 21806).

Q5. Expressions that evaluate to a real constant are not supported.

A5. This is a known limitation in XST. Support for this is planned for ISE 9.1i.

Q6. Using disable constructs in "for loops" does not work.

A6. This is a known limitation in XST. Support for this is planned for ISE 9.1i.

Q7. Signed input in case statements is not supported.

A7. This is a known limitation in XST. Support for this is planned for ISE 9.1i.

Q8. Hex input in case statements is not supported.

A8. This is a known limitation in XST. Support for this is planned for ISE 9.1i.

Q9. Hierarchical defparam is not supported.

A9. This is a known limitation in XST. Support for this is planned for ISE 9.1i.

Q10. The Verilog "wait" statement is not supported.

A10. This is a known limitation in XST. There is no fix scheduled for this issue.

Q11. XST does not reject size mismatch in assignment.

A11. This is a known limitation in XST. Support for this is planned for ISE 9.1i.

Q12. "WARNING:Xst:819 - file.vhd Line xx: The following signals are missing in the process sensitivity list..."

A12. See (Xilinx Answer 14310).

Q13. An unconstrained integer results in bad quality.

A13. This is a known limitation in XST. Support for this is planned for ISE 9.1i.

Q14. "ERROR:Xst:783 - top.vhd line 12: Matrix not supported yet."

A14. See (Xilinx Answer 14649).

Q15. Declaring constants in one package and assigning them in another is not supported.

A15. This is a known limitation in XST. No fix is scheduled for this issue.

Q16. A nested "for loop" in VHDL is not supported.

A16. This is a known limitation in XST. No fix is scheduled for this issue.

Q17. The use of multiple wait conditions is not supported.

A17. This is a known limitation in XST. No fix is scheduled for this issue.

Q18. Use of the same integer variable for two separate loops generates an incorrect netlist.

A18. See (Xilinx Answer 22066).

Q19. "ERROR:HDLParsers:818 - Cannot determine the type of the selector &".

A19. See (Xilinx Answer 22098).

Q20. Use of the same integer variable for two separate loops generates an incorrect netlist.

A20. See (Xilinx Answer 22066).

Q21. Does XST support Verilog-specific blocks?

A21. See (Xilinx Answer 22171).

Q22. "ERROR:Xst:2088 Disable statement not supported in a for loop."

A22. See (Xilinx Answer 22177).

Q23. XST does not support ifdefs in meta comments.

A23. See (Xilinx Answer 22227).

Q24. "FATAL_ERROR:Xst:Portability/export/Port_Main.h:<numbers>".

A24. See (Xilinx Answer 23210).

Q25. "ERROR:Xst:1923 - Line <MY_LINE> has not enough elements for target <MY_DATA>".

A25. See (Xilinx Answer 22376).

Q26. Virtex/-E, Spartan-II/-E - Dual-Port Dual-Write RAM Inference does not work as shown in the XST User Guide.

A26. See (Xilinx Answer 22385).

Q27. "ERROR:LIT:250 - Pins WEA0, WEA1, WEA2, and WEA3 of RAMB16 symbol "<symbol_name>" do not share the same signal. When WRITE_WIDTH_A is set to 1, 2, 4, or 9, these pins should be connected to the same signal."

A27. See (Xilinx Answer 22397).

Q28. What does "ERROR:Xst:772 - "Attribute is not authorized : 'succ'." mean?

A28. See (Xilinx Answer 22495).

Q29. XST runs out of memory or takes a long time to synthesize with designs having nested for loops.

A29. See (Xilinx Answer 22625).

Q30. XST generates incorrect logic when concatenating a 2-bit vector with a 14-bit vector and muxing for a 16-bit vector.

A30. See (Xilinx Answer 22684).

Q31. XST generates incorrect logic for VHDL code that assigns a bus bit-by-bit.

A31. See (Xilinx Answer 22753).

Q32. FSM is not getting encoded by XST when there is no initial condition.

A32. See (Xilinx Answer 22761).

Q33. XST - "WARNING:HDLParsers:3530 - Time stamp of file <name_of file>.vhd is newer than the current system time."

A33. See (Xilinx Answer 23050).

Q34."ERROR:HDLParsers:3501 - Circular dependency is not supported!"

A34. See (Xilinx Answer 23141).

Q35."ERROR:NgdBuild:752 - Line xx in '<design>.ucf': Could not find instance(s) 'inst_lut100' in the design"; errors occur for designs that passed correctly in ISE 8.1i.

A35. See (Xilinx Answer 23249).

Q36."Warning "Xst:2183: the following tristate(s) are NOT replaced by logic"; reason why XST cannot replace TBUFs with logic.

A36. See (Xilinx Answer 20048).

Q37. XST fails to report the correct number of block RAMs in a design.

A37. This is a known issue with XST; use the MAP report to obtain the most accurate number. This issue will be fixed in ISE 9.1i.

Q38. XST has a problem mapping I/O flip-flop and RESET inside IOB in some cases.

A38. See (Xilinx Answer 23273).

Q39. XST does not allow passing strings for integers.

A39. In the older versions of XST, passing integers as strings is allowed. This is against the LRM and should not be allowed. Consequently, the behavior in XST in ISE 8.2i is correct and will be maintained in future releases.

Q40. "ERROR:HDLParsers:808 - "C:/.../des.vhd" Line 599. TO_INTEGER cannot have such operands in this context."

A40. See (Xilinx Answer 23309).

Q41. XST generates incorrect logic when an integer type is used in a record type in VHDL.

A41. See (Xilinx Answer 23334).

AR# 23209
Date Created 04/05/2006
Last Updated 12/15/2012
Status Active
Type General Article