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AR# 23229

8.2i Install - ISE Release Notes Known Issues


Keywords: alert, readme, 82i, release, note

The ISE 8.2i Release Notes packaged with your ISE shipment or found on the Electronic Fulfillment site contain installation instructions, system requirements, and other general information about ISE 8.2i.

This Known Issues Answer Record is a supplement to the 8.2i Release Notes and contains links to information on known issues in the software that may be resolved in service packs or future versions.


(Xilinx Answer 22022) - 8.2i ISE - "Symbol '_XpertDisplayList' causes overflow in R_X86_64_PC32 relocation" occurs when I attempt to launch some applications
(Xilinx Answer 20326) - 8.2i ISE - Text seen in ISE applications is cutoff or too large on Linux and Solaris platforms
(Xilinx Answer 23408) - 8.2i ISE - ISE online help files contain the words "Draft :Xilinx Confidential"

CORE Generator
(Xilinx Answer 23396) - 8.2i CORE Generator - Known Issues for CORE Generator ISE 8.2i) for COREGen Known issues
(Xilinx Answer 23397) - 8.2i CORE Generator - Cores missing from ISE 8.2i release

(Xilinx Answer 17506) - 8.1i CPLD TAEngine - Performance information for timing constraints is not displayed in the detailed static timing analysis report
(Xilinx Answer 19546) - 8.1i CPLDFit - Period timing constraint fails to analyze register to clock enable path
(Xilinx Answer 21653) - 8.1i CPLDFit - The fitter report equations in VHDL are missing CE port connection
(Xilinx Answer 22993) - 8.1i CPLDFit - Preserve Unused Inputs option does not work

(Xilinx Answer 23400) - 8.2i DATA2MEM - ERROR:Data2MEM:74 - Unsupported FPGA device name 'xc5vlx50'

(Xilinx Answer 23443) - 8.2i NGDBuild - ERROR:NgdBuild - Partition ... was defined, but there is no instance ...
(Xilinx Answer 23444) - 8.2i XST - WARNING:HierarchicalDesignC - Source for Partition ... has been removed
(Xilinx Answer 23445) - 8.2i XST - INTERNAL_ERROR:Xst:cmain.c:3086: ...
(Xilinx Answer 23446) - 8.2i XST - ERROR:XST:71 - Redeclaration of an instance : ...
(Xilinx Answer 23447) - 8.2i Project Navigator - A timing constraint or command line changes causes all partitions to be re-done
(Xilinx Answer 23449) - 8.2i PAR - INTERNAL_ERROR:SpeedCalc:Dly_RouteCalcImpl.c:196: - GetLoadDelay called node not routed on signal ...
(Xilinx Answer 23450) - 8.2i MAP/PAR - Different results on Solaris compared to Linux and Windows
(Xilinx Answer 23451) - 8.2i MAP - ERROR:Pack:1569 - The dual data rate register ... failed to join...
(Xilinx Answer 23452) - 8.2i MAP - FATAL ERROR with a guide file specified
(Xilinx Answer 23453) - 8.2i MAP - Fails with Partition on RPM module
(Xilinx Answer 23454) - 8.2i MAP - FATAL_ERROR:Pack:pkibangmhelper.c:478: - Problem encountered while adding partition ports. ...
(Xilinx Answer 23455) - 8.2i PAR - ERROR:Place:120 - There were not enough sites to place all selected components ...
(Xilinx Answer 23456) - 8.2i MAP - ERROR:MapLib:872 - MAP cannot preserve UP_TO_DATE Partition ...
(Xilinx Answer 23457) - 8.2i PAR - WARNING:Route:438 - The router has detected an unroutable situation due to local congestion
(Xilinx Answer 23458) - 8.2i Project Navigator - Partition information is lost when Snapshot is restored
(Xilinx Answer 23459) - 8.2i PAR - ERROR:Par:338 - An unroutable condition has been encountered with the current placement and the use of Partition ...

Project Navigator
(Xilinx Answer 23403) - 8.2i ISE - Known Issues for Project Navigator 8.2i

(Xilinx Answer 23207) - 8.2i ISE Simulator (ISIM) - Known issues with ISE Simulator
(Xilinx Answer 20374) - 8.2i/8.1i/7.1i/6.3i SmartModel, Simulation - Can I use Linux 64 with AMD Opteron machines with the Xilinx SmartModels?
(Xilinx Answer 23208) - 8.2i NetGen, Timing Simulation - Known Issues with NetGen
(Xilinx Answer 21950) - ModelSim Xilinx Edition (MXE) - After installation, with my USB dongle plugged in, my computer does not see the USB dongle on Windows XP machines
(Xilinx Answer 23211) - 8.2i Simulation - Known Issues with ISE Simulation Libraries

TCL Console
(Xilinx Answer 23432) - 8.2i TCL - Nothing happens with "project get_partition *"
(Xilinx Answer 23433) - 8.2i TCL - System level commands (ls) and redirection do not work within TCL scripts
(Xilinx Answer 23434) - 8.2i TCL - "An unknown, unexpected condition (exception)occurred while executing this command."
(Xilinx Answer 23435) - 8.2i TCL - Search command does not search source files
(Xilinx Answer 23436) - 8.2i TCL - Saving timing analysis in script uses incorrect extension
(Xilinx Answer 23437) - 8.2i TCL - "project set family Virtex4" command causes ERROR:TclTaskC
(Xilinx Answer 23438) - 8.2i TCL - "project new J:\cosv\test" causes ERROR:HierarchicalDesignC:43
(Xilinx Answer 23439) - 8.2i TCL - Unable to do partial matching syntax in Tcl scripts
(Xilinx Answer 23440) - 8.2i TCL/xtclsh - Control-C kills the xtclsh session, along with the previous TCL command
(Xilinx Answer 23441) - 8.2i TCL - No Error code when implementation fails in Tcl script
(Xilinx Answer 23442) - 8.2i TCL - Project Navigator does not reflect the commands done in the TCL console

Virtex-5 Constraints
(Xilinx Answer 23420) - 8.2i Virtex-5 Constraints - Unable to apply IO specific constraints (DRIVE, IOBDELAY, IOSTANDARD)
(Xilinx Answer 23421) - 8.2i Virtex-5 Constraints - Unable to lock (LOC) placement of global logic components (RAM, PPC, DCM, etc)
(Xilinx Answer 23422) - 8.2i Virtex-5 Constraints - Unable to create Area Constraints on Clock Regions, for timegroups, or the top level
(Xilinx Answer 23423) - 8.2i Virtex-5 Cross-Probing - The complete path is not shown in Floorplan-Implemented tab
(Xilinx Answer 23424) - 8.2i Virtex-5 Create Timing Constraints Process & Create Area Constraints Process - Closing Timing Constraints tab, closes Floorplan/Package tabs
(Xilinx Answer 23425) - 8.2i Virtex-5 Constraints - Duplicate constraints are created after Importing a different UCF and hangs on prohibits
(Xilinx Answer 23426) - 8.2i Virtex-5 Create Timing Constraint Process - Prompted after launching to provide UCF and NGD file
(Xilinx Answer 23427) - 8.2i Virtex-5 Project Navigator - Crashes when sorting columns, cross-probing, or placing components
(Xilinx Answer 23428) - 8.2i Virtex-5 Create Area Constraints Process - The World View is very thin and only the title is displayed
(Xilinx Answer 23429) - 8.2i Virtex-5 Constraints - Unable to place (LOC) IO via distribution button or to IO Banks, and no tool tips during drag and drop
(Xilinx Answer 23430) - 8.2i Virtex-5 Project Navigator - Crashes when I try to cross-probe to my design with PCIE component
(Xilinx Answer 23431) - 8.2i Virtex-5 Create Timing Constraint Process - ERROR:ConstraintsEditorC - Please enter a number... message

(Xilinx Answer 22247) - 8.2i WebUpdate - WebUpdate does not launch from ISE Project Navigator on Solaris

(Xilinx Answer 21741) - 8.1i XPower - Peak Power is unrealistically high
(Xilinx Answer 17453) - 8.1i XPower - Device support list contains XBR, but not CoolRunner-II
(Xilinx Answer 21743) - 8.1i XPower - MGT power in GUI is different from power in report
(Xilinx Answer 21972) - 8.1i XPower - VccIO power is not calculated for CoolRunner-II devices
(Xilinx Answer 18493) - 8.1i XPower - DCM quantity and frequency do not impact VccAux power

(Xilinx Answer 23209) - 8.2i XST - Known Issues with XST
(Xilinx Answer 23448) - 8.2i XST - ERROR:HDLCompilers:87 - "Hdl/fc/macfpga_core_4g.v" line 721 Could not find ...
AR# 23229
Date 04/23/2008
Status Archive
Type General Article