This Answer Record contains the Release Notes for the LogiCORE Ethernet Statistics v2.1 Core, which was released in the 8.2i IP Update #1, and includes the following:
- New Features in v2.1
- Bug Fixes in v2.1
- Known Issues in v2.1
For installation instructions and design tools requirements, see (Xilinx Answer 23479).
New Features in v2.1
- Support added for ISE 8.2i
- Support added for Virtex-5
- Improved example design hierarchy for core portability
Bug Fixes in v2.1
Known Issues in v2.1
- Virtex-4 Verilog simulations in ModelSim PE cause memory collision errors. For more information on this issue, refer to (Xilinx Answer 21375).
- When used with the Virtex-4 Embedded Ethernet MAC Wrapper LogiCORE (with 1000BASE-X or SGMII (1Gb/s) interfaces only), the statistics did not increment for odd-sized frames. This issue is fixed in the Ethernet Statistics v2.2 available in the 8.2i IP Update 2 LXT Supplement, which is scheduled for release in late October 2006.