The EDK 8.2i Release Notes packaged with your EDK shipment (or located on the Electronic Fulfillment site) contain installation instructions, system requirements, and other general information about EDK 8.2i.
This Known Issues Answer Record is a supplement to the 8.2i Release Notes and contains links to information on known issues in the design tools that might be resolved in service packs or future versions.
NOTE: EDK 8.2i requires ISE 8.2i Service Pack 1.
(Xilinx Answer 23584) 8.2i EDK - How can I get the Xilinx Spartan-3 PCI Express board selection in XPS?
(Xilinx Answer 23585) 8.2i EDK - MicroBlaze watchpoints when used from SDK do not work
(Xilinx Answer 23586) 8.2i EDK - Some issues with debugging on MicroBlaze when Dcache is turned on
(Xilinx Answer 23736) 8.1i EDK OPB_MDM v2.00.a - MDM clock must be twice as fast as System ACE clock for ELF load
(Xilinx Answer 23741) 8.2i EDK - MicroBlaze version 5 floating point division works only if integer divider is enabled
(Xilinx Answer 23760) 8.2i EDK - Debug Wizard does not properly update the processor system when ChipScope is added
General EDK IP
(Xilinx Answer 23722) 8.2i EDK SP1- The opb_pci_v1_02_a bridge deasserts toutsup early when the OPB and PCI clocks are set to the same frequency
(Xilinx Answer 23723) 8.2i EDK SP1- The opb_pci_v1_02_a bridge retries after latency timer timeout, repeats data last sent for OPB to PCI writes
(Xilinx Answer 23724) 8.2i EDK SP1- The temac_vxworks5_4_v1_00_a: SgSendDre and cache flush does not work
(Xilinx Answer 23725) 8.2i EDK SP1- The opb_ipif_v2_00_j corrupts address during a PCI burst read of OPB BRAM
(Xilinx Answer 23726) 8.2i EDK SP1 - In the opb_hdlc_v2_01_a, the Multi Channel HDLC is not properly initialized after an OPB reset
(Xilinx Answer 23727) 8.2i EDK - The opb_pci_v1_02_a Internal DMA writes extra data causing data corruption
(Xilinx Answer 23728) 8.2i EDK SP1- OPB peripherals master_attachment module created though wizard with OPB SGDMA fails when Posted Write mode disabled is used
(Xilinx Answer 23729) 8.2i EDK SP1 - The opb_pci_v1_02_a bridge hangs with slow PCI clock during Configuration Read
(Xilinx Answer 23730) 8.2i EDK SP1 - The opb_pci_v1_02_a writes extra data on PCI device causing data corruption
(Xilinx Answer 23400) 8.2i Data2MEM - "ERROR:Data2MEM:74 - Unsupported FPGA device name 'xc5vlx50' -- Virtex-5 not supported"