We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 23947

8.2i Spartan-3E FPGA Editor - Logic Block Editor does not display output capability for IOB site


My design has an IOB that only uses the input side in the logical design. It is locked to a general purpose IOB site that is output capable. When I view the IOB configuration in the Logic Block Editor, all that is visible is the input side of the IOB. The FPGA Editor does not display the full capability of this site. How can I manually modify the IOB configuration if the desired configuration is not visible? 


Spartan-3E devices have input-only sites available. A new component type "IBUF" was created to make use of these sites. The MAP application creates IBUF components for all input-only pads so that the placer has the option of placing them in both the input-only sites and also in the full IOB sites. This occurs even if the pad is locked to an IOB site. What the FPGA Editor displays is the component and its configuration, and not the full capability of the site itself.  


This situation is comparable to the display of a SLICEL component that is placed in a SLICEM site. The Logic Block Editor does not display the memory capabilities of the SLICEM site because SLICEL components have no memory capability.


You should be able to manually change the component attributes of the IBUF component in the FPGA Editor so that the component type becomes "IOB". However, this functionality was tested recently on a test case design and it did not work and the editor crashed. This crash is under investigation. Meanwhile, you can delete the IBUF component in the FPGA Editor and create a new IOB component to replace it.

AR# 23947
Date 05/20/2014
Status Archive
Type General Article