ISE 8.2.03i has overly restrictive I/O banking rules for the Spartan-3E devices. A form of the following error can occur when running MAP with the -timing option or when running BitGen:
"ERROR:PhysDesignRules:759 - IOB comp <"comp_name"> at location <"pin_name"> is incompatible for bank <"x">. The incompatible code is <"x">."
This error message is incorrectly issued by the Design Rules Check (DRC), which is run in the MAP tools when you use the -timing option and when you run BitGen (Generate Programming File). The error occurs when you place or lock an LVDS output with differential termination in the same bank as any other 2.5V standard, such as LVCMOS25. This combination is legal on the device and should be allowed to pass by software.
This problem is a regression from version 8.2i SP2. It will be fixed in version 9.1i. Meanwhile, a patch is available for version 8.2i SP3. The following patch file is for use on all platforms:
To install, unzip in the XILINX install directory while maintaining directory structure.
NOTE: This patch file only affect Spartan-3E designs with the specific error mentioned above.