AR# 2417: SYNOPSYS: Logical Library does not map to a host directory.
SYNOPSYS: Logical Library does not map to a host directory.
Keywords: synopsys, logical, library, host
FPGA Compiler issues the following error message:
"Logical Library xc4000e does not map to a host directory" when the following library statement is used in a VHDL file:
Library xc4000e; Use xc4000e.components.all
These Library/Use statements are only needed for VHDL simulation, and are not needed for synthesis. If simulation will not be performed they can be removed from the source code. If simulation is to be used, then a .synopsys_vss.setup file is required to map the library.
An example .synopsys_vss.setup file is provided in $XACT/examples/synopsys/xilinx.synopsys_vss.setup file. Copy this file to the project directory and omit the prefix (xilinx) of the file name. In the .synopsys_vss.setup file there needs to reside the following line: