UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 24191

8.2i EDK - PlatGen ERROR:MDT - chipscope_ila_0 (chipscope_ila) - couldn't change working directory

Description

After I added ChipScope IBA and ICON core in a design, PlatGen runs successfully under WinXP OS but not under Linux. I receive the following errors: 

 

WARNING: vhdl is not supported as a language. Using usenglish. 

while executing 

"exec xst -ifn $xst_scr_filename" 

(procedure "synthesize_cs_edk_port_mapper_core" line 55) 

invoked from within 

"synthesize_cs_edk_port_mapper_core $param_table" 

(procedure "::hw_chipscope_opb_iba_v1_01_a::opb_iba_generate" line 94) 

invoked from within 

"::hw_chipscope_opb_iba_v1_01_a::opb_iba_generate 149285704"  

ERROR:MDT - chipscope_ila_0 (chipscope_ila) - couldn't change working directory 

to "synthesis": no such file or directory 

while executing 

"cd synthesis" 

(procedure "synthesize_cs_edk_port_mapper_core" line 8) 

invoked from within 

"synthesize_cs_edk_port_mapper_core $param_table" 

(procedure "::hw_chipscope_ila_v1_01_a::ila_generate" line 83) 

invoked from within 

"::hw_chipscope_ila_v1_01_a::ila_generate 149991176"  

ERROR:MDT - platgen failed with errors!

Solution

To resolve this issue, please check to see if the LANGUAGE environment variable exists. 

For example: "LANGUAGE: en_US:en_GB:en" 

 

If it exists, please unset the LANGUAGE environment. 

Type following in CShell: 

 

unsetenv LANGUAGE

AR# 24191
Date Created 09/04/2007
Last Updated 05/20/2014
Status Archive
Type General Article