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AR# 24270

System Generator for DSP - Why are my clock pin LOC constraints being ignored when I netlist using the Multiple Subsystem Generator (MSG) block?

Description

Why are my clock pin LOC constraints being ignored when I netlist using the Multiple Subsystem Generator (MSG) block?

Solution

When you have clock constraints in your System Generator Token, they will be ignored when you netlist using the Multiple Subsystem Generator block. If you need to constrain the clock, you will have to do it using a UCF with the top-level design generated from the Multiple Subsystem Generator block.

AR# 24270
Date Created 09/04/2007
Last Updated 05/20/2014
Status Archive
Type General Article