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AR# 24281: MPMC2 v1.7 - MPMC2 appears to hang on the PIM (PLB/OPB/NPI/XCL) read request when using a DDR2 memory
MPMC2 v1.7 - MPMC2 appears to hang on the PIM (PLB/OPB/NPI/XCL) read request when using a DDR2 memory
On my first read request from any of my PIMs (PLB/OPB/NPI/XCL), either a burst or single beat transfer, the system locks up or appears to hang. What could be the problem?
This issue occurs when tRTP is less than tCK, which is typical when running the DDR2 clock at less than 133 MHz.
Use the following steps to work around this issue:
1. Generate an MPMC2 pcore where tRTP is larger than tCK.
2. In the MHS file, adjust C_MPMC2_0_REFRESH_CNT_MAX to the correct value for the clock frequency you are using. This value should be tREFI (in ns) / tCK (in ns). The only consequence to this change is that each read and write can take extra clock cycles, as the pcore was generated assuming a faster memory clock frequency than is actually being used.
NOTE: This issue will be fixed in MPMC2 version 1.8.