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AR# 24313

LogiCORE Block Memory Generator - Core might give unexpected outputs and simulation warning "# ** Warning: Functional warning at simulation time ..."

Description

When using Block Memory Generator (all versions) for Virtex-4 and Virtex-5 with the following feature settings:

.....Use Byte-write Enable

.....Write-First Operating Mode

You might see the following warning during simualtion:

# ** Warning: Functional warning at simulation time ( 1572 ns) : RAMB16( :top:bm_tb:test1_dut:bmg0:bmg0:bu2_u0_blk_mem_generator_valid_cstr_ramloop_0_ram_r_v4_ram_

true_dp_single_prim_tdp:) port A is in WRITE_FIRST mode requiring all bits of WEA to be all '1's or all '0's to guarantee valid outputs.

#

# Time: 1572 ns Iteration: 3 Instance:

/top/bm_tb/test1_dut/bmg0/bmg0/bu2_u0_blk_mem_generator_valid_cstr_ramloop_0_ram_r_v4_ram_

true_dp_single_prim_tdp

Solution

The Block Memory Generator will build a memory that might only use a portion of a Block Memory primitive in Virtex-4 or Virtex-5.

Following are some examples (the configurations are not limited to these examples):

Example 1:

Memory Port A Width (all ports): 9

Memory Port A Depth (all ports): 256

Memory Port B Width (all ports): 18

Memory Port B Depth (all ports): 128

In this case, the Block Memory Generator builds the memory from two possible primitive configurations that allow for the byte-write enable feature and the 2:1 asymmetric port ratio. The two possible configurations for Virtex-4 are 2048x9 x 1024x18, and 1024x18 x 512x36. If the 1024x18 x 512x36 primitive is used, then only a portion of the data bits from the core are actually connected to the primitive. This behavior can occur whether the user has selected the Minimum Area Algorithm, or the Fixed Primitive Algorithm options.

Assuming the 1024x18 x 512x36 primitive is used, the user asserting WEA=1 will result in an internal write enable vector on the primitive of WE[3:0]=0001 on port A. For this reason, there is only a partial write occurring on the primitive. In WRITE_FIRST mode, this means that the output of the Block Memory will be invalid.

This functionality is documented on page 13 of the Block Memory Generator datasheet:

===Virtex-5 and Virtex-4 Write First Mode===

When performing a write operation in WRITE_FIRST mode, the concurrent read operation shows the

newly written data on the output of the core. However, when using the byte-write feature or a

non-symmetric aspect ratio, the output of the memory can not be guaranteed. For details of the hardware

limitations of the architecture, see the Virtex-4 or Virtex-5 user guides.

The UniSim primitives issue a warning to the user that this condition exists, flagging the user's attention to the fact that the data may be invalid during a write.

Example 2:

Memory Width (all ports): 45

Memory Depth (all ports): 256

This example is similar to Example 1, but shows that the problem can occur for nearly any width or depth. In this case, it is possible that the Block Memory Generator might only partly use one Block RAM. For example, this memory can be constructed with one 512x36 primitive and one 1024x18 primitive, or some other combination. If this is the case, one of the primitives might not have all it's data bits connected, as in Example 1. Whenever WRITE_FIRST mode is used with byte-write enable, there is the possibility that this warning can occur, as long as the configuration yields partly-used primitives.

Example 3:

Memory Width (all ports): 9

Memory Depth (all ports): 256

In this case, the Block Memory Generator can use a number of possible primitive configurations. Since the byte-write enable feature is selected, the possible configurations for Virtex-4 are 2048x9, 1024x18, and 512x36. (Note that, in this example, the data is only 1-byte wide.) If the 1024x18 or 512x36 primitives are used, then only a portion of the data bits from the core are actually connected to the primitive.

Assuming the 512x36 primitive was used, the user asserting WE=1 will result in an internal write enable vector on the primitive of WE[3:0]=1000.

For this reason, there is only a partial write occurring on the primitive. In WRITE_FIRST mode, this means that the output of the Block Memory is invalid.

Example 4:

Memory Width (all ports): 18

Memory Depth (all ports): 512

In this case, the Block Memory Generator can use a couple of possible primitive configurations. Since the byte-write enable feature is selected, the possible configurations for Virtex-4 are 1024x18 and 512x36. If the 512x36 primitive is used, then only a portion of the data bits from the core are actually connected to the primitive.

Assuming the 512x36 primitive is used, the user asserting WE[1:0]=10 will result in an internal write enable vector on the primitive of WE[3:0]=1010.

For this reason, there is only a partial write occurring on the primitive. In WRITE_FIRST mode, this means that the output of the Block Memory is invalid.

Solutions:

This is not a core issue. When using byte-write enable or asymmetric ports with WRITE_FIRST mode, be sure that you do not rely on the data being read during a write operation, because it cannot be guaranteed to be valid.

To prevent this warning, the user can modify the configuration to avoid the parameter combinations which generate this condition. Also, modifications to the width, depth, or algorithm could alter the structure of the memory. For Example 1 above, if the user is using the Minimum Area Algorithm option, increasing the depth to 2048 forces the use of the 2048x9 primitive, which would not have this problem. Alternatively, for Example 1, using the Fixed Primitive algorithm and forcing the use of the 2048x9 primitive will also avoid this warning.

AR# 24313
Date Created 09/04/2007
Last Updated 12/15/2012
Status Active
Type General Article