The EDK 9.1i Release Notes, packaged with your EDK shipment or located on the Electronic Fulfillment site, contain installation instructions, system requirements, and other general information about EDK 9.1i.
This Known Issues Answer Record is a supplement to the 9.1i Release Notes and contains links to information on known issues in the software that might be resolved in service packs or future versions.
NOTE: EDK 9.1i requires ISE 9.1.01i.
(Xilinx Answer 24737) 9.1i EDK - "** Error: (vsim-SDF-3196) Failed to find SDF file "system_tb.sdf"."
(Xilinx Answer 24738) 9.1i EDK - Some projects unexpectedly crash on Linux with the LD_ASSUME_KERNEL set
(Xilinx Answer 24739) 9.1i EDK - "ERROR:MDT - xget_handle PROCESSOR * : A NULL handle was provided"
(Xilinx Answer 24742) 9.1i EDK - Profiling with recursive functions reports incorrect number of calls to the functions
(Xilinx Answer 18703) 9.1i EDK - Unable to launch GDB; an error message occurs: "Cannot find a usable main.tcl"
(Xilinx Answer 24746) 9.1i EDK - Using a Cygwin version later than 1.5-17 can cause errors at runtime
(Xilinx Answer 24747) 9.1i EDK - What version of GNU is being used with 9.1i EDK?
(Xilinx Answer 24758) 9.1i EDK - Cross-probing with ChipScope and MicroBlaze v5 is not working
(Xilinx Answer 24293) 9.1i EDK - ModelSim - logic.vhd(359): (vopt-1144) Value 0 is out of std.standard.natural range 1 to 32
(Xilinx Answer 24771) 9.1i EDK - The behavior of XMD in SDK is inconsistent
General EDK IP
(Xilinx Answer 24748) 9.1i EDK - PLB DDR 2.00a controller - support for 16-bit data width transactions with no ASYNC_SUPPORT
(Xilinx Answer 24749) 9.1i EDK SP2 - intc_v1_00_c - Driver files - XIntc_mDisableIntr macro is incorrect
(Xilinx Answer 24750) 9.1i EDK- FSL_V20 v2.00a - Allow BRAM-based FIFO in the FSL component
(Xilinx Answer 24751) 9.1i EDK-microblaze_v4_00_a - FSL put drops data in non-blocking mode
(Xilinx Answer 24752) 9.1i EDK - OPB SPI (v1.00d and 1.00e) data sheet does not mention Spartan-3E as a supported family
(Xilinx Answer 24753) 9.1i EDK- opb_ethernet_v1_04_a - keeps tx_en asserted when operating in 10 Mbps mode and CRC is inserted manually
(Xilinx Answer 24754) 9.1i EDK-microblaze_v5_00_c - Setting Optimization Level to 0 - MicroBlaze does not jump to interrupt handler
(Xilinx Answer 24755) 9.1i EDK-microblaze_v5_00_c - UART 16550 does not give an output to the terminal when the hardware mult is used in the microblaze_v5