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AR# 24572

11 EDK - PowerPC remains in Wait State when an external interrupt is issued


In my SW application, I enable the PowerPC to the wait state. According to the PowerPC reference guide, the PowerPC continues to respond to interrupts and be can be restarted through the use of external interrupts and timer interrupts. However, in my case, the PowerPC goes back to the wait state after returning from interrupt.

I have been debugging this and found out that because of the context switching in the Xilinx implementation the old machine states are copied back into the SRR1 and MSR register. As a result, the PowerPC will always remain in the wait state even if I clear the SRR1 [WE] bit in the interrupt handler routine. Do I need to modify the Xilinx vector handler table to change this context switching behavior in Xilinx's BSP?


Refer to the PowerPC 405 / 440 Processor Exception Handling section in the OS and Libraries Document Collection ($XILINX_EDK/doc/usenglish/oslib_rm.pdf) for information on how to wake up your processor after it is in a wait state.
AR# 24572
Date 12/15/2012
Status Active
Type General Article
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