When I implement the design in ISE 8.2.03i, an error message occurs:
"ERROR:PhysDesignRules:1312 - Illegal signal connection found for adjacent RAMB16 and MULT18X18 placement"
This problem has to do with a design rule check that detects a false positive for a connectivity check. This check will be fixed for ISE version 10.1i. Meanwhile, the problem can be avoided by constraining the components apart, or by setting the following environment variable:
Linux and Solaris
setenv XIL_PAR_KEEP_BRAM_MULT_APART 1
For general information about setting ISE environment variables, see (Xilinx Answer 11630).