We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 24687

8.2 SW AccelDSP Synthesis Tool - Sometimes, Project -> Open returns to the last successful step, but sometimes it does not


When opening an existing project, I discover that there are times when the tool restores the project to the last successful step. At other times, the following warning message occurs: 


"W-FLOW-0001: Files in your design have been modified since your last run. You will need to rerun all the stages after Generate Fixed Point" 




The restoration of an existing project depends heavily upon the time-date-stamps on the files used to define the design. If a design dependent file has been modified since the last execution of the tool, you will receive the "W-FLOW-0001" warning message. The key is to understand what are the "design dependent" files, for they are more than the MATLAB files. Design Dependent Files include the MATLAB files that make up the design, the MATLAB files used to generate the data (script file), the Project File (*.acc), the directives files (*.add), and any file specified with a "load" function call. 


Sometimes, the modifications to one of these files is not obvious. For example, suppose the MATLAB has a call to the "load" and "save" functions, and both the "load" and "save" specify the same file. Then, every time a MATLAB verification is executed, you will over-write a design dependent file. In such a situation AccelDSP will always display the Warning Message "W-FLOW-0001" during the opening of an existing project.

AR# 24687
Date 05/21/2014
Status Archive
Type General Article