The PCI v4.x cores now have a 512-bit output port called "CFG." What does this port represent, and why is there no longer a CFG[255:0] input vector as there was in the PCI v3.x cores?
The PCI v3.x cores are configured using the CFG[255:0] input vector and the "cfg.v (vhd)" file. In the PCI v4.x cores, this configuration is now accomplished directly through the core customization in the CORE Generator. The new CFG[511:0] vector is a product of this configuration information, and this output reflects the configuration to the User Application.
The configuration information is represented by the CFG[511:0] output vector as follows: