General Description: Beginning with FPGA Express 3.0, users may see a new warning when synthesizing case statements:
Warning: No MUX_OP inferred for the case in routine state_machine line XX in file '<filename>.vhd' because it might lose the benefit of resource sharing. (HDL-380)
This warning is simply information about the synthesis of the design. FPGA Express has seen that, for the specified case statement, inference of a mux would be less optimal than the combinatorial logic that it infers; this is because a mux would prohibit FPGA Express from investigating operator sharing for that case statement.
This warning can be safely ignored.
Furthermore, the environment variable listed in the extended Help does not apply to the FPGA Express product, so do not attempt to set this variable.