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AR# 25000

9.1i MAP - "INTERNAL_ERROR:Pack:pkibadbmend.c:189:1.18 - Found an incomplete connection"

Description

When I run MAP in ISE 9.1i, the following fatal error message occurs: 

 

"INTERNAL_ERROR:Pack:pkibadbmend.c:189:1.18 - Found an incomplete connection on 

comp block 

mpmc2_ddr2_ididpp_200mhz_x64_sl72p8m128m8m_a37fyu_0/mpmc2_ddr2_ididpp_200mhz_ 

x64_sl72p8m128m8m_a37fyu_0/mpmc2_plb_if_4/waddr_be0<1>. The signal 

size_decode_i_2_2 was found on the comp block pin F1, but no child signal 

exists. 

 

FATAL_ERROR:Pack:pkivrlogicmend.c:423:1.21 - Comp 

mpmc2_ddr2_ididpp_200mhz_x64_sl72p8m128m8m_a37fyu_0/mpmc2_ddr2_ididpp_200mhz_ 

x64_sl72p8m128m8m_a37fyu_0/mpmc2_plb_if_4/waddr_be0<1>: Missing LUT input 

signal on LUT Bel. Process will terminate. For more information on this 

error, please consult the Answers Database or open a WebCase with this 

project attached at http://www.xilinx.com/support."
 

When is this problem going to be fixed, and is there a way to work around this issue?

Solution

This problem will be fixed in ISE 9.2i, which is scheduled for release in June 2007. 

 

For versions of ISE prior to version 9.2i, use one of the following to work around the problem : 

 

Solution 1 

 

Set the environment variable NO_CARRY_TRIM_PUSH to "1" (See (Xilinx Answer 11630) for more information on setting environment variables). The disadvantage to this method is that MUXCY are not optimized according to specified constraints. 

 

Solution 2 

 

Use map -ignore_keep_hierarchy when running the MAP tool from the command line, or check the "Allow Logic Optimization Across Hierarchy" box from the MAP Properties window in Project Navigator.

AR# 25000
Date Created 09/04/2007
Last Updated 05/21/2014
Status Archive
Type General Article