This Release Note and Known Issues Answer Record is for the LogiCORE Initiator/Target v4.3 for PCI, released in 9.2i IP Update 1, and contains the following information:
- General Information
- New Features
- Bug Fixes
- Known Issues
For installation instructions, general CORE Generator known issues, and design tools requirements, see (Xilinx Answer 25222).
The LogiCORE PCI v4.3 supports Virtex-5 and newer architectures only. For all other devices, use the v3.162 PCI Core. For more information on this core, refer to (Xilinx Answer 25495).
- See (Xilinx Answer 22921) for general information regarding timing closure in Virtex-4 devices.
- Support for ISE 9.2i Service Pack 2
CRs 419556, 438334, 438337: Fixed NCELAB error: "*E,CUVHNF (<unisims_ver>/unisims_ver_virtex5_source.v, 26508|22): Hierarchical name component lookup failed at 'glbl'" when compiling the VHDL core with a mixed-mode (Verilog/VHDL) cds.lib file.
- Refer to the release notes text file,"pci64_release_notes.txt," delivered with the core for known issues at the time of the release.
- See (Xilinx Answer 25217) regarding duplicated PCI core entries in the CORE Generator taxonomy list.