When I generate my hardware co-simulation block from System Generator, the implementation flow completes and a bit file is created. However, I do not get a new hardware co-simulation library and System Generator reports "ERROR: Could not create the hardwrare co-simulation block."
The first thing to check if this occurs is whether timing was met on the design. Open the file XFLOW results and look at the timing report in the PAR section of the report. If all timing constraints were not met, a co-simulation block will not have been created. Try using the Timing Analysis compilation target to identify the critical paths and insert some pipeline registers to improve the timing results.
This may also happen if your System Generator token has cached some data which can cause problems. If all timing constraints have been met, delete the System Generator token from your model, save it, and add a new one from the Simulink Xilinx blockset library and save it again. After replacing the System Generator token, select the hardware co-simulation target again and select generate.