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Foundation XVHDL: Synthesis error "Wrong number of fields bus on line #__ in .xas file"
Keywords: Metamor, VHDL, Wrong, fields, bus, xas
Using Foundation XVHDL to synthesize the code, the following
error is reported:
"Wrong number of fields bus on line #__ in .xas file"
A possible cause of this error is that in the VHDL code a
single bit was specified as a vector as shown below:
sig_name: out std_logic_vector(7 downto 7);
The solution is to change this to a single bit such as:
sig_name7: out std_logic;
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