We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 29233

LogiCORE RapidIO v4.1 - On the receive (RX) side, AckID misalignment is observed


If you are transmitting a packet accepted with an SOF on a packet that gets discontinued in the very next cycle, then the AckID counter gets misaligned (which causes erroneous packet accepted symbols), resulting in an illegal Link Response that causes a port error.


To work around this issue, if the link device is in port_error and needs to stop traffic, then issue a lnk_linkreset_n. 

This issue will be fixed in SRIO v4.2 core, scheduled for October 2007.

AR# 29233
Date 05/22/2014
Status Archive
Type General Article
Page Bookmarked