How do you declare I/O pins as auxiliary analog input pins of System Monitor?
When instantiating the System Monitor, its auxiliary analog input pins have to be declared as such in the top level port mapping. MAP and PAR will automatically place them correctly.
For example, in VHDL :
entity toplevel is
Port ( clk : in STD_LOGIC;
Vauxp_15 : in STD_LOGIC;
Vauxn_15 : in STD_LOGIC;
----
SYSMON_inst : SYSMON
Port map (
---
VAUXP => Vccauxp_int,
VAUXN => Vccauxn_int
);
Vccauxp_int <= Vauxp_15 & "000000000000000";
Vccauxn_int <= Vauxn_15 & "000000000000000";
Answer Number | Answer Title | Version Found | Version Resolved |
---|---|---|---|
35153 | 11.4 PlanAhead - Incorrect DRC warning in relation to System Monitor auxilliary analog inputs | N/A | N/A |
24537 | Virtex-5 System Monitor - What are the FAQs for the System Monitor? | N/A | N/A |
AR# 29240 | |
---|---|
Date | 02/28/2013 |
Status | Active |
Type | General Article |