When running a design built with Base System Builder, the following errors occur:
"ERROR:MDT - issued from TCL procedure
"::hw_clock_generator_v1_00_a::gen_clock_circuit" line 12
C_NUM_DCM (clock_generator) -
Failed to generate clock circuit!
ERROR:MDT - IPNAME:clock_generator INSTANCE:clock_generator_0 -
mpd line 34 - error computing override value for C_NUM_DCM using
This problem is caused by the bus frequency settings for the design. When the bus frequency is set at 150 MHz or 37.5 MHz, this error occurs.
This issue has been fixed in the latest EDK 9.2i Service Pack, available at:
The first service pack containing the fix is EDK 9.2i Service Pack 1.