We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 29523

9.2i EDK, MPMC v3.00a - What is the bit ordering of the MPMC?


What is the bit ordering of the MPMC interfaces?


The MPMC uses downto bit ordering for the physical external memory interface and the NPI PIM. All other PIMs use a to bus ordering. 


The MPMC data sheet has been updated to reflect this information, starting with EDK 9.2i Service Pack 2 starting with MPMC v3.00.b.

AR# 29523
Date 05/20/2014
Status Archive
Type General Article
Page Bookmarked