We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 29947

9.2i EDK - MicroBlaze v6.00.b tactical patch


A tactical patch for MicroBlaze version 6.00.b.


A patch has been created for MicroBlaze version 6.00.b. The patch works with EDK 9.1i and EDK 9.2i and is not included in any service packs.

1. Download the patch at:


2. Unzip the contents of the patch into your EDK installation directory and overwrite all existing files.

Change Log

- Corrected interrupt occurring after interrupts have been disabled.

- Do not allow interrupts during exception handling.

- Allow use of 32 KB caches for Virtex-5 targets.

- Ensure that synchronized reset is used for all flip-flops.

- Corrected reading of BTR when FPU is enabled.

- Allow external break to occur also when interrupts are disabled.

- Corrected reading of PVR from Xilinx Microprocessor Debugger.

- Changed 64-bit multiplication to avoid incorrect result for some operand values.

- Avoid incorrectly setting FSR on an interrupted floating-point instruction.

- Ensure that exceptions following an interrupt or other exceptions are correctly discarded.

- Changed signed integer division to avoid incorrect result under certain circumstances.

- Avoid incorrect memory access when single-stepping load or store in Xilinx Microprocessor Debugger.

- Corrected setting of DZ bit in MSR for interrupted integer division instructions.

- Ensure that Xilinx Microprocessor Debugger always stops on watchpoints.

- Avoid stalling execution due to write cache instruction conflict with cache data read.

- Block hardware breakpoint detection during debug stop to avoid false breakpoints.

AR# 29947
Date 12/15/2012
Status Active
Type General Article
Page Bookmarked