Spartan-3AN - What does bit 0 of the Status Register represent? The Spartan-3AN FPGA In-System Flash User Guide (UG333) is inconsistent.
As is outlined in the Spartan-3AN FPGA In-System Flash User Guide (UG333), bit 0 of the Status Register represents the Page Size. This indicates whether the page size of the main memory array is configured for "power of 2" binary page size (512 bytes) or standard DataFlash page size (528 bytes).
There are discrepancies between Table 6-1 and Table 6-6 in the UG333.
Table 6-6 is correct.
If bit 0 of the status register is a 1, then the page size is set to 512 bytes.
If bit 0 of the status register is a 0, then the page size is set to 528 bytes.