This Release Note and Known Issues Answer Record is for the LogiCORE Initiator/Target for PCI v3.165 released in ISE 10.1 Initial IP Update, and it contains the following information:
- General Information
- New Features
- Bug Fixes
- Known Issues
For installation instructions, general CORE Generator known issues, and design tools requirements, see the IP Release Notes Guide at: http://www.xilinx.com/support/documentation/user_guides/xtp025.pdf.
The LogiCORE PCI v3.165 supports only Virtex-4, Spartan-3, and older architectures. For Virtex-5 devices, use the v4.5 PCI Core. For more information on this core, refer to (Xilinx Answer 30117).
- See (Xilinx Answer 22921) for general information regarding timing closure in Virtex-4 devices.
- ISE 10.1i design tools support
- Example design scripts automatically generated with the user's choice of device
-The documentation (User Guide, Getting Started Guide, and Data Sheet) contained in the doc does not contain the most recent versions. The versions delivered with the core are from the 9.2i IP Update 2 release. The most recent documentation can be obtained on the Xilinx Web site. Please follow these steps:
1. Go to: http://www.xilinx.com/support/documentation/index.htm
2. Select the IP Cores.
3. Select Bus Interface and IO.
4. Select PCI/PCI-X core in use.