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AR# 30169

LogiCORE 3GPP2 Turbo Convolutional Code Encoder - Release Notes and Known Issues

Description

This Answer Record contains the Release Notes and Known Issues list for the CORE Generator LogiCORE 3GPP2 Turbo Convolutional Code Encoder core. 

 

The following information is listed for each version of the core: 

- New Features 

- Bug Fixes 

- Known Issues 

 

LogiCORE 3GPP2 Turbo Convolutional Encoder Lounge: 

http://www.xilinx.com/products/ipcenter/DO-DI-TCCENC.htm


The 3GPP2 Turbo Convolutional Encoder core has been discontinued. Please see the Following PDN: 

http://www.xilinx.com/support/documentation/customer_notices/xcn14010.pdf

Solution

General LogiCORE 3GPP2 Turbo Convolutional Code Encoder Issues 

- N/A 

 

 

LogiCORE 3GPP2 Turbo Convolutional Code Encoder v2.0 rev1 

Initial Release in ISE 9.1i IP Update 2 

New Features 

- Support added for Spartan-3A DSP 

Bug Fixes 

- Same as v2.0 

Known Issues 

- Same as v2.0 

 

 

LogiCORE 3GPP2 Turbo Convolutional Code Encoder v2.0 

Initial Release in ISE 9.1i IP Update 1 

New Features 

- Implements block sizes specified by 3GPP2 C.S0024-B 

Bug Fixes 

- N/A 

Known Issues 

- N/A 

 

 

LogiCORE 3GPP2 Turbo Convolutional Code Encoder v1.0 

Initial Release in ISE 6.1i IP Update 1 

New Features 

- Supports the CDMA2000 and 3GPP2 standards 

- Support for all Spartan-II, Spartan-3, and Spartan-3E, Virtex, Virtex-E, Virtex-II, and Virtex-II Pro FPGAs 

- Fully synchronous design using a single clock 

- External memory option 

Bug Fixes 

- N/A 

Known Issues 

- N/A

AR# 30169
Date Created 03/13/2008
Last Updated 04/02/2015
Status Active
Type General Article
Devices
  • Virtex-5