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AR# 30181

9.2i EDK, MPMC v3.00a - Init_done does not go High when running at frequencies below 170 MHz in Virtex-4 with DDR/DDR2


Keywords: calibration, initialization, mig, MPMC2, low, frequency

Init_done does not go High when running at memory frequencies below 170 MHz in Virtex-4 while using a MIG PHY with DDR/DDR2 MIG PHY. How do I resolve this issue?


This issue has been fixed in the current version of the EDK software. The first version containing a fix is MPMC v3.00.b, delivered in EDK 9.2i Service Pack 2. The MPMC v3.00.b fix may slightly reduce overall memory timing margin.

Full optimal memory timing margin is planned to be resolved in MPMC v4.00.a and later, to be released in EDK 10.1.

For more information, see (Xilinx Answer 29912).
AR# 30181
Date Created 01/30/2008
Last Updated 03/25/2009
Status Active
Type General Article