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AR# 30185

9.2 iMPACT - Playing an SVF file results in "ERROR:iMPACT:2613..."

Description

When I play an SVF file that is generated using an ".isc" IEEE 1532 JTAG programming file for a Platform Flash device, the following error occurs: 

 

"ERROR:iMPACT:2613 - Failed ScanDR: TDO xx does not match Expected TDO(xx)"

Solution

The default algorithm used by 1532 mode is the non-deterministic (looping) flow. Since SVF does not support branch on condition or looping, the generated SVF will not work.  

 

To work around this issue, change the BSDL file algorithm name to swap the deterministic flow for the non-deterministic. There is a known issue in generating ".isc" files that is described in (Xilinx Answer 23201)

 

Erase Example 

 

-- Standard Erase with looping 

 

"flow_erase " & 

"INITIALIZE " & 

"(XSC_UNLOCK 24:00003F wait TCK 1)" & 

"(ISC_ERASE 24:00003F wait 10.0e-3)" & 

"loop min 1 max 14000" & 

"((XSC_OP_STATUS wait 10.0e-3 5:06,1:1:OST,2:2))," & 

 

-- Xilinx alternative erase flow without LOOP feature 

 

"xflow_erase_no_loop " & 

"INITIALIZE " & 

"(XSC_UNLOCK 24:00003F wait TCK 1)" & 

"(ISC_ERASE 24:00003F wait 140)" & 

"(XSC_OP_STATUS wait 10.0e-3 8:36)," & 

 

Parse the SVF file to check the Erase function being used; it will be flagged by a comment similar to the following: 

 

// Device: 1 procedure: PROC_ERASE 

// Device: 1 flow: FLOW_ERASE 

 

To have the SVF flow use the "xflow_erase_no_loop" process, you need to swap the names between the processes and comment out the looping process being used. So, the modified BSDL file would contain the following: 

 

--"flow_erase " & 

-- "INITIALIZE " & 

-- "(XSC_UNLOCK 24:00003F wait TCK 1)" & 

-- "(ISC_ERASE 24:00003F wait 10.0e-3)" & 

-- "loop min 1 max 14000" & 

-- "((XSC_OP_STATUS wait 10.0e-3 5:06,1:1:OST,2:2))," & 

 

-- Xilinx alternative erase flow without LOOP feature 

 

"flow_erase " & -- Flow name changed 

"INITIALIZE " & 

"(XSC_UNLOCK 24:00003F wait TCK 1)" & 

"(ISC_ERASE 24:00003F wait 140)" & 

"(XSC_OP_STATUS wait 10.0e-3 8:36)," & 

 

This should be repreated for the Program and Verify operations. 

 

For assistance with this issue, contact Xilinx Technical Support: 

http://www.xilinx.com/support/clearexpress/websupport.htm

AR# 30185
Date Created 01/31/2008
Last Updated 05/22/2014
Status Archive
Type General Article