When building a design function with the intent of interfacing to System Generator or Hardware Simulation (HW-CoSim), I need a circuit that has a constant number of clock cycles for each call to the design function (sometimes called constant throughput). How can I write the MATLAB behavior to achieve a constant number of clock cycles?
A "block" in System Generator requires a fixed number of clock cycles between successive inputs. Consequently, a block from AccelDSP must have a fixed number of clock cycles for each call to the design function. Also, the HW-CoSim flow in AccelDSP uses System Generator to build the interface to the hardware. Consequently, it requires a constant number of cycles as well.
A constant number of clock cycles (sometimes called "constant throughput") is strongly dependent on how the MATLAB code is written. Conditional "exits" from loops and loops inside a conditional branch typically result in a non-constant throughput. Consequently, it is best to use a MATLAB coding style that does not use these constructs.
To obtain a constant throughput, Xilinx recommends that the MATLAB behavior for the design function be written with the following restrictions:
- Do not use While loops.
- Use FOR loops that have a constant "begin", "step" and "end" value.
- Do not place a FOR loop inside an IF-THEN-ELSE statement (you can have a conditional inside a FOR loop).
WARNING: Matrix arithmetic operations and AccelWare functions often contain FOR loops.
Hint: Unrolling a FOR loop (fully unrolled) effectively removes the FOR loop, but increases the size of the circuit.
- Do not use conditional exists to leave a loop early.
- Inside a FOR loop, do NOT overwrite the loop variable/index.
- Keep conditional behavior simple. If complex behavior is conditionally executed, then rewrite it so it is always executed. For example, rewrite the following:
if ( <condition>)
y = sin(x);
As the following:
tmp = sin(x);
if ( <condition> )
y = tmp;