Changing the Port Width Override value in the Port n Control CSR (0x5C) should force re-initialization to change to the requested size. However, this does not currently happen.
This issue will be addressed in SRIO v4.4, expected for release in late May 2008.
If you need a patch for this sooner, please open Xilinx Technical WebCase at
Please have the Technical Support Engineer contact the RapidIO core expert.