Why is there an extra bit on the COEF_DIN input port of my reloadable interpolation filter when the *_reload.txt file does not contain any additions or subtractions?
This occurs because there is currently no distinction made for special cases in which there are no additions or subtractions to the coefficient list. Xilinx is currently investigating a fix for this issue in a future release of the FIR Compiler.
To work around this issue, you must sign-extend your coefficients to properly fill the extra bit when loading them into the core.
See (Xilinx Answer 29138) for a detailed list of LogiCORE FIR Compiler Release Notes and Known Issues.