We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 30664

9.2 - System Generator for DSP - Why do I receive errors when I try to generate an EDK PCORE from System Generator with a single shared memory block larger than 256 in depth?


When I try to generate an EDK PCORE from System Generator, I receive errors if my shared memory is not size 2^N, where N is an integer. Errors also occur if I only have a single shared memory in my design.


There are some known issues in System Generator 9.2i that cause problems with valid shared memory configurations.

If Log2 of the size of a shared memory is not an integer, errors occur during generation. This occurs because the resulting memory address width cannot automatically be calculated. To work around this issue, round up the depth to the nearest 2^N value. Alternatively, you can split the memory into two smaller memories that are both 2^N deep, where N is an integer. Starting in 10.1.01, the address width will be automatically rounded up to the nearest integer that is adequate for the requested depth.

Another known cause for errors during PCORE generation is designs with a single shared memory block. This is caused by an extra mux that is not needed for single shared memory designs. To work around this issue, an additional shared memory should be added that can be a "dummy" shared memory of minimum size. This known issue is resolved in System Generator for DSP 10.1.

AR# 30664
Date 12/15/2012
Status Active
Type General Article