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AR# 30772

10.1 EDK - Spartan-3AN Starter Kit BSB results in "Incompatible IOB's are locked to the same bank" error

Description

Keyword: IO Standard

Spartan-3AN Starter Kit can select 133.33 MHz clock as reference clock. If SPI Flash device is also enabled, XPS will report an error in MAP phase similar to the following:

"ERROR:Place:864 - Incompatible IOB's are locked to the same bank 2
Conflicting IO Standards are:
IO Standard 1: Name = LVTTL, VREF = NR, VCCO = 3.30, TERM = NONE
List of locked IOB's:
fpga_0_SPI_FLASH_SS_pin<0>
fpga_0_SPI_FLASH_SS_pin<1>
IO Standard 2: Name = LVCMOS25, VREF = NR, VCCO = 2.50, TERM = NONE
List of locked IOB's:
sys_clk_pin
These IO Standards are incompatible due to VCCO mismatch"

Solution

XPS will apply LVCMOS25 as default IOSTANDARD. To resolve the problem, add the constraint "Net sys_clk_pin IOSTANDARD = LVCMOS33;" in the UCF file.

This problem has been fixed in the latest 10.1 Service Pack available at:
http://www.xilinx.com/support/download/index.htm
The first service pack containing the fix is 10.1 Service Pack 2.
AR# 30772
Date Created 05/27/2008
Last Updated 06/17/2008
Status Active
Type General Article