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AR# 30793

11 EDK - The PowerPC TLB (Translation Lookaside Buffer) has been invalidated

Description

Keywords: PLB, PPC, simulation, SmartModel, Xs

When simulating a PPC design without any PLB peripherals (i.e., no PLB bus attached to it), I find that the following error occurs.

"# ** Note (SmartModel):
#
# ---> 895000 DEAR = xxxxxxxx
#
# ---> 895000 DCWR = xxxxxxxx
#
# ---> 895000 ZPR = xxxxxxxx
#
# ---> 895000 SLER = xxxxxxxx
#
# ---> 895000 SU0R = xxxxxxxx
#
# ---> 895000 PID = 000000xx
#
# ---> 895000 ICCR = xxxxxxxx
#
# ---> 895000 DCCR = xxxxxxxx
#
# ---> 895000 SGR = xxxxxxxx
#
# ---> 895000 CTR = xxxxxxxx
#
# ---> 895000 CCR0 = xxXxxxX0
#
# ---> 895000 CR = xxxxxxxx
#
# ---> 895000 ESR = XxXXX000
#
# ---> 895000 SRR3 = 00XXxxX0
#
# ---> 895000 SRR1 = 00XXxxX0
#
# ---> 895000 MSR = 0X0XxxX0
# The PowerPC TLB (Translation Lookaside Buffer) has been invalidated.
# This may also be caused inadvertently if the processor reads Xs on its bus.
# If this is the case, please rectify the problem in the design before progressing.
#
# ---> 895000 CCR0 = xxxxxxXX
# Time: 895000 ps Instance:/system_tb/dut/ppc405_0/ppc405_0/ppc405_adv_i/ppc405_adv_i/ppc405_adv_swift_bw_1/
ppc405_adv_swift_inst
# ** Note (SmartModel):
#
# ---> 905000 ICDBDR = xxxxxxxx
# Time: 905000 ps Instance:/system_tb/dut/ppc405_0/ppc405_0/ppc405_adv_i/ppc405_adv_i/ppc405_adv_swift_bw_1/
ppc405_adv_swift_inst"

Solution

This is a problem with SimGen.

Work-around #1:
Downgrade the PowerPC wrapper to v1.01a ( pre-PLBv46 version).

Work-around #2:
Attach a dummy PLB core to the PowerPC.


AR# 30793
Date Created 06/16/2008
Last Updated 05/26/2009
Status Active
Type General Article