When using a MPMC2 Core, the system infrequently hangs while accessing the MPMC2 over the PLB bus, just after a PLB abort is asserted on an secondary (PLB SAValid asserted) transaction. The failure seems to be related to high bus activity. It does not appear to be timing related. How do I resolve this issue?
This is caused by the MPMC2 PLB PIM not resetting its internal state logic when an abort is performed on a secondary PLB transaction.
A patch is available that will disable the use of secondary transactions to work around this issue.
1. Download patch zip file from:
2. Extract the zip file to a temporary directory.
3. From the directory matching the desired MPMC2 version, backup and then overwrite the original "mpmc2_plb_if.v" file from the generated MPMC2 pcore "hdl/verilog" directory.
4. Rebuild the design and test. NOTE: A very slight increase in latency might be seen with this patch due to the disabling of all secondary PLB transactions.
MPMC3 and later versions are not affected by this issue.