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AR# 30879

Spartan-3A - What is the Tsamp value for Spartan-3A families?


What is the setup and hold capture window value of an IOB input flip-flop (Tsamp) in a source synchronous design on the Spartan-3A device?


This Answer applies to Spartan-3A, Spartan-3AN, and Spartan-3A DSP.

The input capture sample window value is highly specific to a particular application, device, package, I/O standard, I/O placement, DCM usage, and clock buffer.

Please consult (Xilinx XAPP485): "1:7 Deserialization in Spartan-3E FPGAs at Speeds Up to 666 Mbps" for a similar discussion on an earlier family:


AR# 30879
Date 12/15/2012
Status Archive
Type General Article
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