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AR# 30888

Endpoint Block Plus Wrapper for PCI Express v1.7 and v1.7.1 - I cannot generate a x8 Block Plus core targeting a Virtex-5 LX30T device

Description

I cannot generate a x8 Block Plus core targeting a Virtex-5 LX30T device. Why?

Solution

The Virtex-5 LX30T is offered in two packages, but the FF323 package only contains four transceivers (2 GTP_DUALs). An eight lane implementation in the Virtex-5 LX30T is only supported in the FF665 package, which contains eight transceivers (4 GTP_DUALs). Currently, CORE Generator does not allow you to generate an eight lane core when targeting the XC5VLX30TFF665-1. Eight lane support will be added in v1.8, which is scheduled for IP Update #2 for 10.1.

To work around this issue, generate a x8 core targeting a LX50T-1FF665 device and use the UCF provided below.

You can download the eight lane UCF for the XC5VLX30T-1FF665 at:

http://www.xilinx.com/txpatches/pub/applications/pci/pcie_block_plus_x8_xc5vlx30t_2ff665.zip

Revision History

05/07/2008 - Initial Release

AR# 30888
Date Created 05/07/2008
Last Updated 12/15/2012
Status Active
Type General Article