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AR# 31303

Spartan-3A DSP Video Starter Kit Users Guide (UG456 v1.1) - Bandwidth information is incorrect

Description

There are a few discrepancies between the XtremeDSP Kit Spartan-3A DSP 3400A User Guide v2.1 and the Spartan-3A VSK Users Guide (UG456) v1.1.

Solution

The Spartan-3A VSK Users Guide (UG456) v1.1 reports:

Page 42 - Figure 3-6 shows the memory bandwidth as 19200 Mb/s, which equates to a 64-bit data bus at 166 MHz.

The correct information can be found in XtremeDSP Kit Spartan-3A DSP 3400A User Guide v2.1 and above:

Page 2 - The Revision history shows that for v1.1, of the Users Guide, the DDR2 clock rate was limited to 133 MHz.

Page 31 - DDR2 Clock is only tested for 133 MHz with a data rate of 266 MHz, and faster rates are not guaranteed.

Page 32 - In Table 28, only 32 pins are mapped to the FPGA.

Page 35 - DDR2 Memory expansion section also notes that only 32 data pins are routed to the FPGA, and not 64 bits as are available on the default DDR2 Memory.

Also, it should be noted that even though the testing was done for a clock rate of 133 MHz, the VSK clock is set to 125 MHz, and the DDR data rate is only 250 MHz.

Spartan-3A DSP 3400A Users Guide:

http://www.xilinx.com/support/documentation/hw-sd3400a-dsp-db-uni-g.htm

Spartan-3A VSK Users Guide UG456 v1.1:

http://www.xilinx.com/support/documentation/boards_and_kits/ug456.pdf

AR# 31303
Date Created 09/04/2008
Last Updated 12/15/2012
Status Active
Type General Article