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AR# 31503

10.1 Virtex-5 PAR - "ERROR:Route:472 - This design is unrouteable"

Description

PAR fails to route a CI (or BI) pin in my design and quits with the following error messages. 

 

ERROR:Route:472 - 

This design is unrouteable. 

To evaluate the problem please use fpga_editor. 

 

Routing Conflict 1: 

Net:IIC_EEPROM/IIC_EEPROM/x_iic/IIC_CONTROL_I/data_i2c_i<4> on pin CI on location SLICE_X0Y16 

Net:DDR2_SDRAM/DDR2_SDRAM/mpmc_core_0/gen_v5_ddr2_phy.mpmc_phy_if_0/u_phy_io_0/gen_dq[43]. 

u_iob_dq/stg1_out_rise_0s on pin CX on location SLICE_X0Y16 

Conflict detected on wire: PINBOUNCE(-68967,-141448) 


This is similar to the issue described in (Xilinx Answer 24688), and I have tried rerunning the design with the XIL_PAR_ENABLE_CHKCIBIPINS variable set, but it still fails. 


What is wrong with this connection? 


Note: This Answer Record should be followed only if the routing conflict message specifically mentions either the "CI" or "BI" pin as the sample message above does.

Solution

A problem has been identified with the algorithm that checks for the routing conflict mentioned in (Xilinx Answer 24688) where some routing conflicts are undetected.  

 

This problem has been fixed in the latest 10.1 Service Pack available at: 

http://www.xilinx.com/support/download/
 

The first service pack containing the fix is 10.1 Service Pack 3. 

 

Note: In addition to setting the variable XIL_PAR_ENABLE_CHKCIBIPINS, it is now also necessary to set the variable XIL_PAR_ENABLE_Virtex-4_CHKCIDIPINS to enable all routability checks. 

 

Windows 

SET XIL_PAR_ENABLE_CHKCIBIPINS=1 

SET XIL_PAR_ENABLE_Virtex-4_CHKCIDIPINS=1 

 

Linux 

setenv XIL_PAR_ENABLE_CHKCIBIPINS 1 

setenv XIL_PAR_ENABLE_Virtex-4_CHKCIDIPINS 1 

 

For more general information about setting ISE environment variables, see (Xilinx Answer 11630).

AR# 31503
Date Created 08/18/2008
Last Updated 07/31/2014
Status Active
Type General Article
Tools
  • ISE - 10.1