UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 31568

LogiCORE Initiator/Target for PCI v4.8 - Release Notes and Known Issues for ISE 10.1 IP Update 3 (IP_10.1.3) and 11.1

Description

This Release Note and Known Issues Answer Record is for the LogiCORE Initiator/Target for PCI v4.8 released in ISE 10.1 IP Update 3 and contains the following information:

- General Information

- New Features

- Bug Fixes

- Known Issues

For installation instructions, general CORE Generator known issues, and design tools requirements, see the IP Release Notes Guide at:

http://www.xilinx.com/support/documentation/user_guides/xtp025.pdf

Solution

General Information

The LogiCORE Initiator/Target for PCI v4.8 supports Virtex-5 and newer architectures only. For all other devices, use the v3.166 PCI Core. For more information on this core, refer to (Xilinx Answer 31567).

New Features

- ISE 10.1sp3 tool support

Resolved Issues

- None

Known Issues

-Timing simulation might not work. This is due to the problem described in (Xilinx Answer 30815).

(Xilinx Answer 32500) LogiCORE Initiator/Target v4.8 for PCI - Implementing XC5vLX110t-FF1136 may cause PAR error: ERROR:Route:472 - This design is unrouteable.

Revision History

04/13/2009 - Added 32500

09/19/2008 - Initial Release

AR# 31568
Date Created 09/09/2008
Last Updated 12/15/2012
Status Active
Type General Article